Small and simple first-level cache

ACM记得关VPN

缓存访问的

small

size
associativity 减小size和associativity 可以减少hit time和功耗

simple

Direct mapped cache可以减少hit time, 因为根据地址可以唯一确定对应的缓存块并比较tag. 而如果用fully-associative或set-associative,就需要和多个缓存的块比较tag,才能判断是否命中。

First Optimization: Small and Simple First-Level Caches to Reduce Hit Time and Power The pressure of both a fast clock cycle and power limitations encourages limited size for first-level caches. Similarly, use of lower levels of associativity can reduce both hit time and power, although such trade-offs are more complex than those involving size. The critical timing path in a cache hit is the three-step process of addressing the tag memory using the index portion of the address, comparing the read tag value to the address, andsetting the multiplexor to choose thecorrectdata item if thecache is set associative. Direct-mapped caches can overlap the tag check with the transmis sion of the data, effectively reducing hit time. Furthermore, lower levels of associa tivity will usually reduce power because fewer cache lines must be accessed

Small and simple first-level cache

Comments